Delta-sigma modulators are increasingly used in receivers for mobile communication. Many different standards exist for mobile communication: GSM, UMTS, CDMA2000 etc. Many of these operate at different frequency bands and with different bandwidths. Especially for the receiver part of a mobile telecommunications system this typically means that specific receivers have to be designed for one frequency range and one bandwidth, because of the analogue nature of the received signal. Although it would be possible to completely digitise the analogue signal, this is usually too elaborate for normal applications. It is more efficient to do some analogue filtering first, and then proceed to analogue-to-digital conversion. This is, in principle, what a continuous-time band pass delta-sigma modulator (CT BP DSM) does. The analogue part of the delta-sigma modulator achieves some bandwidth reduction around the centre frequency of interest, and the feedback action of the DSM provides an efficient error reduction, so that at the digital output of the delta-sigma modulator a digital representation of the analogue payload can be expected.
Unfortunately, analogue filters, such as LC resonators or so called tanks, cannot be easily re-tuned to different frequency bands during operation. US Patent Application Publication No. 2005/0237233 A1 proposes a programmable loop filter for use with a sigma-delta analog-to-digital converter and method for programming the same. The loop filters shown in this document comprise resistor-capacitor networks (RC networks) wherein the values of the resistors and the capacitors can be varied. However, accuracy usually suffers so that an exact frequency selection is difficult to achieve. Moreover, the ranges of variation of variable resistors or capacitors are usually not very large (or else accuracy is further degraded). Thus it appears that the programmable loop filter proposed in U.S. Patent Application Publication No. 2005/0237233 A1 could still be improved. The entire disclosure of U.S. Patent Application Publication No. 2005/0237233 A1 is hereby included by reference into the description.
U.S. Patent Application Publication 2006/0119491 A1 describes a dual-mode delta-sigma modulator analogue-to-digital converter system and method that supports two modes of operation. The digital converter system includes a selection unit for permitting the high-frequency resonator circuit and the low-frequency resonator circuit to be employed in a first mode of operation. The system also permits the high-frequency resonator circuit and the feed forward path from the final integrator in the high-frequency resonator circuit to the summer (near the DSM input) to be disabled in a second mode of operation. The digital converter system in U.S. Patent Application Publication 2006/0119491 A1 has a time discrete configuration on its analogue side as opposed to a continuous time configuration. The loop filter is a time discrete filter, as well, that does not contain inductances L or capacitances C. Rather, the loop filter is in the form of a digital filter. The entire disclosure of U.S. Patent Application Publication No. 2006/0119491 A1 is hereby included by reference into the description.
U.S. Pat. No. 6,693,573 discloses a sigma-delta modulator which utilises Micro Electro Mechanical Systemicro electro mechanical system (MEMS) technology coupled with an on-chip LC networks. The MEMS switches of U.S. Pat. No. '573 are used to switch individual ones of capacitors and inductors in and out of the LC network to alter the centre frequency and tuning range of the sigma-delta modulator.